Logic Design II and Laboratory

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Course No: ETEC.3420-001; SIS Class Nbr: 12582; SIS Term: 2830
Course Status: Open

Course Description

This course studies synchronous sequential circuits and register transfer logic. Latches and flip-flops. Registers. Counters. Analysis and design of synchronous sequential circuits. Moore model and Mealy model. Two's complement arithmetic. Algorithmic state machine (ASM) chart. One-hot state assignment. Register transfer logic. Data-path and control circuit. Design of a simple arithmetic processor.

Prerequisites, Notes & Instructor

  • Prerequisites: ETEC.3410
  • Special Notes: 17.341 Logic Design I and Lab and 17.342 Logic Design II and Lab replace 17l.346 Logic Design A, 17.347 Logic Design B and 17.348 Logic Design C.
  • Section Notes:
  • Core Codes: STEM
  • Credits: 3; Contact Hours: 3
  • Instructor: Dohn Bowden
  • Textbook Information

When Offered & Tuition

  • M , 6:30 PM-9:20 PM
  • Spring 2019: Jan 22 to May 07
  • Course Level: Undergraduate
  • Tuition: $1020
  • Note: There is a $30 per semester, nonrefundable registration fee for credit courses.

Related Programs: B.S. in Electronic Engineering Technology

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